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Anuja George

/Anuja George
Anuja George 2019-01-12T02:34:35+00:00

Prof. Anuja George

Assistant Professor
Department of Electronics and Communication Engineering
Mobile Number: +91 9048409677
Date of joining SJCET: 03/01/2012
Association with the institution: Regular

Sl.No Qualification University Year of passing Specialization
1 B.Tech M.G University 2009 Electronics and Communication Engineering
2 M.Tech M.G University 2011 VLSI and Embedded Systems
3 Ph.D
Date of joining SJCET            : 03/03/2012

Status as on date of joining    : Assistant professor

Present status                   : Assistant professor

Sl. No Name of Institution Type of Membership Membership ID

Sl. No


Name of Training/Workshop Year & Date (Duration) Organizer


1 CMOS, Mixed Signal  & Radio Frequency VLSI Design 30th Jan to 4th Feb,2017 IIT,Kharagpur
2 Embedded Design Using ARM and ARDUINO 18/11/2015 to 24/11/2015 Saintgits College of Engineering and Technology, Kottayam
3 Wireless Communication Networks 24th to 28th Nov 2014 Adi Shankara Institute of Engineering and Technology
4 Advanced Digital Signal Processing 18th to 22nd November, 2013 TKM College of Engineering
5 Electronics in Medical Diagnosis 6th to 17th May 2013 Albertian Institute of Science and Technology (AISAT), Kalamassery
6 Introduction to research methodologies 25th June to 4th July 2012 IIT, Bombay
7 Current Advancements in Communication, Control and Instrumentation Engineering 17th to 18th May 2012 SJCET,PALAI

International Journals

Sl.No Title of Paper Name of journal Publisher Year, Volume & ISSN/ISBN No.
1 FPGA Implementation of EEG Feature Extraction and Seizure Detection International Journal of Innovative Research in Science, Engineering and Technology Vol. 5, Issue 9, September 2016
2 Speedy Convolution Using Reversible Vedic Multiplier International Journal of Scientific and Research Publications Volume 6, Issue 9, September 2016
3 Design and validation of SHA 384 IP core International Journal of Computer Science & Technology VOL5.3-1, September, 2014
4 A   Novel IEEE 754 Standard Floating Point Unit Comprising Fused Add-Subtract Unit IJAREEIE Vol. 2, Special Issue 1, December 2013
5 A Novel Design of Low Power, High Speed SAMM and its FPGA Implementation International Journal of Computer Applications (IJCA) Volume 43– No.4, April 2012
6 A Novel Low Power Design of SRAM Cell And Its Performance Analysis International Journal of Computer Applications (IJCA) 2011