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Sunitha S Pillai

/Sunitha S Pillai
Sunitha S Pillai 2025-08-21T06:29:57+00:00

Prof. Sunitha S Pillai

Assistant Professor
Department of Electronics and Communication Engineering
Mobile Number: +91 8086704959
Email: sunitha.s.pillai@sjcetpalai.ac.in
Date of joining SJCET: 23/01/2006
Association with the institution: Regular

Sl.NoQualificationUniversityInstitutionYear of passingSpecialization
1B.TechTCUSACOLLEGE OF ENGG. KIDANGOOR2009ECE
2M.TechAnna University ThirunelveliPSN COLLEGE OF ENGINEERING AND TECHNOLOGY2011Embedded System Technologies
Name of the College / IndustryDesignationDate of JoiningDate of Relieving
St. Joseph's College of Engineering & Technology, PalaiAssistant ProfessorJanuary, 2006till date
  1.  Sunitha S Pillai,” Waste Classification using Convolutiona l Neural Network on Edge Devices”, “International Journal of Innovative Science and Research Technology”, Volume 5, Issue 11, November – 2020.
  2. Sunitha S Pillai,” Review on LFSR for low power BIST ”, “3rd International Conference on Computing Methodologies and Communication ICCMC 2019,March 2019.
  3. Sunitha S Pillai,” An orthogonal Approximati on of DCT and reconfigurabl e Architecture for Image Compression”, “IJIRSET,volume 5,issue 9,September 2016.
  4. Sunitha S Pillai,” VLSI Design of an efficient Image Encryption-Then-Compression System”, “International Journal of Current Engineering and Technology,volume 5,No:6,December 2015.
  1. Attended Symposium on “Developments in AI & Humanoid Technology and their impact on contemporary India :Promises & Perils at St.Joseph’s College of Engg & Technology,Pala, January 2 to January 4,2025.
  2. Attended FDP on “Advancements in Electronics Systems for health care Applications”, at St.Joseph’s College of Engg & Technology,Palai,from August 29 to August 31,2024” .
  3. Attended one week online FDP on “Multidisciplinary aspects of Low Power Wireless Sensor Networks”, at St.Joseph’s College of Engg & Technology,Palai,from July 24 to July 29 ,2023”.
  1. Attended  FDP on “VLSI Design and applications ”, at St.Joseph’s College of Engg & Technology,Palai,from May 27 to June 1,2024” .
  2. Attended  FDP on “IOT for future connectivity- Insights”, at St.Joseph’s College of Engg & Technology,Palai,from Nov  25 to Nov 30,2024” .
  • Presented paper on “Rain water monitoring system”, at International Conference on Signal processing,Instrumentation & communication Engineering,SPICE 2K24 -2024 organized by MBITS, 9th to 10th February 2024.
  • Eight weeks NPTEL-AICTE Faculty Development Programme on “System Design through Verilog” organized by IIT Madras from July to September 2023.
  • Twelve weeks NPTEL-AICTE Faculty Development Programme on “Control systems” organized by IIT Madras from July to October 2024.
  • Twelve weeks NPTEL-AICTE Faculty Development Programme on “Digital VLSI Testing” organized by IIT Madras from January to April 2025.
  • Resource person in the workshop Electronic System Design using Verilog held as a part of National Tech Fest  5th March Astra 2024.
  • Resource person in the workshop VLSI system System Design held as a part of National Tech Fest  6th & 7th March Astra 2025.
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