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Dr. George Tom Varghese

/Dr. George Tom Varghese
Dr. George Tom Varghese 2025-07-02T05:09:46+00:00

Dr. George Tom Varghese

Associate Professor & Dean Academics II
Department of Computer Science and Engineering
Mobile Number: +91 9437777895
Email: georgetomvarghese@sjcetpalai.ac.in
Date of joining SJCET : 17/06/2009
Association with the institution: Regular

DegreeSpecializationInstitutionUniversityYear of Passing
PhDVLSI DESIGNN.I.T. ROURKELAN.I.T. ROURKELA2015
M.Tech.VLSI DESIGN AND EMBEDDED SYSTEMN.I.T. ROURKELAN.I.T. ROURKELA2009
B.Tech.ELECTRONICS AND COMMUNICATION ENGINEERINGCOLLEGE OF ENGINEERING, CHENGANNURCOCHIN UNIVERISTY OF SCIENCE AND TECHNOLOGY2006
Name of the College / IndustryDesignationDate of JoiningDate of Relieving
St. Joseph's College of Engineering & Technology, PalaiSenior LecturerJune 17,2009 -
St. Joseph's College of Engineering & Technology, PalaiAssistant ProfessorJuly 1, 2010 -
St. Joseph's College of Engineering & Technology, PalaiAssociate Professor18th August 2015 -
Sl. No Name of Institution Type of Membership Membership ID
1. ISTE LIFE MEMBER LM64510
  1. George Tom Varghese, K.K. Mahapatra, “A Low Power Reconfigurable Encoder for Flash ADCs”, Procedia Technology, Volume 25, 2016, Pages 574-581.
  2. George Tom Varghese et al, “Implementation of a novel P&O MPPT controller for photovoltaic system at standard test conditions”, International Journal of Applied Engineering Research, ISSN 0973-4562 Volume 12, 2017, Pages 624-629.
  3.  George Tom Varghese et al, “IoT based Smart Environment Using Node-Red and MQTT”, Journal of Advanced Research in Dynamical & Control Systems, ISSN 1943-023X, Vol. 12, No. 5, 2020.
  4. George Tom Varghese et al, “Machine Learning Techniques for the Diagnosis of Attention-Deficit/Hyperactivity Disorder from Magnetic Resonance Imaging: A Concise Review”, Neurology India, Nov-Dec, 2021;69(6):1518-1523.
  5. George Tom Varghese et al,” An Outlier Detection and Feature Ranking based Ensemble Learning for ECG Analysis”, International Journal of Advanced Computer Science and Applications(IJACSA), Volume 13 Issue 6, 2022.
  6.  George Tom Varghese et al, “An overview on state-of-the-art electrocardiogram signal processing methods: Traditional to AI-based approaches”, Expert Systems with Applications, Volume 217, 1st May 2023.
  7. George Tom Varghese et al,” Energy management and power quality improvement of micro grid system through modified water wave optimization”, Energy Reports, Volume 9, December 2023, Pages 6020-6041.
  1. Presented a paper on “A high speed low power encoder for a 5-bit flash ADC”, at International Conference on Green Technologies (ICGT), 18-20 Dec. 2012
  2. Presented a paper on “A high speed encoder for a 5GS/s 5 bit flash ADC”, at Third International Conference on Computing, Communication and Networking Technologies (ICCCNT’12), 26-28 July 2012
  3. Presented a paper on “An ultra-low power encoder for 5 bit flash ADC”, International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT), 7-9 Jan. 2013
  4. Presented a paper on “Design of optimum power, delay efficient level shifter for biomedical applications”, International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT), 6-7 July 2017
  5. Presented a paper on “Negative body biased comparator design for biomedical applications”, International Conference on Intelligent Computing, Instrumentation and Control Technologies (ICICICT), 6-7 July 2017.
  6. Presented a paper on “Thermometer code to Binary code Converter for Flash ADC – A Review”, International Conference on Control, Power, Communication and Computing Technologies (ICCPCCT), 23-24 March 2018
  7. Presented a paper on “Low Power Wallace Tree Encoder For Flash ADC”, IOP Conference Series: Materials Science and Engineering, 2018
  1. Presented a paper “Comparator Design for Low Power High Speed Flash ADC-A Review”, 3rd International Conference on Computing Methodologies and Communication (ICCMC), 27-29 March 2019.
  1. Eight-week NPTEL-AICTE Faculty Development Programme on “Accreditation and outcome-based learning” organized by IIT Kharagpur from August- October 2019.
  2. Eight-week NPTEL-AICTE Faculty Development Programme on “CMOS DIGITAL VLSI DESIGN” organized by IIT Roorkee from January to March 2020.
  1. First position in M. Tech in VLSI Design and Embedded System from N.I.T. Rourkela.
  2. Appointed as a Board of studies member of the university for the department of Applied Electronics and Instrumentation Engineering as per U.O. No 71/2021/KTU.
  3. Appointed as the Chairperson/ Coordinator of board of question paper setters of fourth semester B. Tech (R&S) examination August 2022.
  4. Approved research supervisor of KTU from 5/10/2021 as per university order No 1902/2021/KTU dated 04/10/2021.
  5. Worked as KTU external auditor in various KTU affiliated institutions.
  1. Received financial assistance of Rs 45,000/- for the development of an automatic height adjusting pillow to relieve chronic neck pain (Cervicalgia) from KTU as per U. O. No. 964/2022/KTU dated 27.04.2022
  2. Received financial assistance of Rs 36,500/- for smart bed, A self-adjustable bed for bedridden patients to prevent bedsore from KTU as per U. O. No 672/2023/KTU dated 18.03.2023.
  1. Delivered a talk on “Low power VLSI” on 6th September 2016 in connection with 3 days faculty development program on “DO-254 Compliance for Design of avionic Hardware for Mil-Aero and safety critical application at College of Engineering, Thalassery.
  2. Chaired a session on “Microelectronics” in the IEEE international conference on next generation intelligent systems (ICNGIS-2016) held at Rajiv Gandhi Institute of Technology, Kottayam from 1st to 3rd September 2016.
  3. Delivered an expert session on “Recent Trends in VLSI Design” on 20th January 2017 in the department of Electronics and Communication Engineering, College of Engineering, Kidangoor.
  4. Chaired the technical session in the department of Electronics and Communication Engineering, Rajiv Gandhi Institute of Technology, Kottayam as part of M. Tech thesis presentation contest-2017 sponsored by CERD, APJAKTU on 07/07/2017.
  5. Attended B. Tech syllabus preparation workshop conducted in Trivandrum from 10/06/2024 to 11/06/2024, organized by APJAKTU, Trivandrum.
  6. Delivered an expert session on “Low power VLSI Design Technologies and VLSI testing and Verification” in the basic ATAL faculty development program organized by the department of Electronics and Communication Engineering, College of Engineering, Perumon on 11/12/2024
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