![15-anuja2](https://sjcetpalai.ac.in/wp-content/uploads/2017/12/15-anuja2-150x150.jpg)
Dr. Anuja George
Assistant Professor
Department of Electronics and Communication Engineering
Mobile Number: +91 9048409677
Email: anujageorge@sjcetpalai.ac.in
Date of joining SJCET: 03/01/2012
Association with the institution: Regular
Sl.No | Qualification | University | Year of passing | Specialization |
---|---|---|---|---|
1 | B.Tech | M.G University | 2009 | Electronics and Communication Engineering |
2 | M.Tech | M.G University | 2011 | VLSI and Embedded Systems |
Date of joining SJCET : 03/03/2012
Status as on date of joining : Assistant professor
Present status : Assistant professor
Sl. No | Name of Institution | Type of Membership | Membership ID |
---|---|---|---|
1 | ISTE | LIFETIME | LM 90175 |
Sl. No | Name of Training/Workshop | Year & Date (Duration) | Organizer |
---|---|---|---|
1 | Self-Sponsored Faculty Development Program On Chip Design (Chip2023) | 3-7 July 2023. | NIT Calicut In Collaboration With IBM |
2 | VLSI Architectures for Digital Signal Processing Systems (VADSPS-21) | 14-18 June, 2021 | NIT, Calicut |
3 | Research Trends in Multimedia and Multirate Signal Processing (RTMMSP 18) | June 4 - 9, 2018 | NIT, Calicut Under twinning with Govt. Engineering College Bharatpur |
4 | CMOS, Mixed Signals & Radio Frequency VLSI Design | 30th Jan to 4th Feb,2017 | IIT,Kharagpur |
5 | Embedded Design Using ARM and ARDUINO | 18/11/2015 to 24/11/2015 | Saintgits College of Engineering and Technology, Kottayam |
6 | Wireless Communication Networks | 24th to 28th Nov 2014 | Adi Shankara Institute of Engineering and Technology |
7 | Signals & Systems | 2nd to 12th Jan, 2014 | IIT,Kharagpur |
8 | Advanced Digital Signal Processing | 18th to 22nd Nov, 2013 | TKM College of Engineering |
9 | Electronics in Medical Diagnosis | 6th to 17th May 2013 | Albertian Institute of Science and Technology (AISAT), Kalamassery |
10 | Introduction to research methodologies | 25th June to 4th July 2012 | IIT, Bombay |
Sl.No | Title of Paper | Name of journal | Publisher | Year, Volume & ISSN/ISBN No. |
---|---|---|---|---|
1 | Hardware-Efficient DWT Architecture for Image Processing in Visual Sensors Networks | IEEE Sensors Journal | 23(5), pp.5382-5390,March 2023 | |
2 | FPGA Implementation of EEG Feature Extraction and Seizure Detection | International Journal of Innovative Research in Science, Engineering and Technology | Vol. 5, Issue 9, September 2016 | |
3 | Speedy Convolution Using Reversible Vedic Multiplier | International Journal of Scientific and Research Publications | Volume 6, Issue 9, September 2016 | |
4 | Design and validation of SHA 384 IP core | International Journal of Computer Science & Technology | VOL5.3-1, September, 2014 | |
5 | A Novel IEEE 754 Standard Floating Point Unit Comprising Fused Add-Subtract Unit | IJAREEIE | Vol. 2, Special Issue 1, December 2013 | |
6 | A Novel Design of Low Power, High Speed SAMM and its FPGA Implementation | International Journal of Computer Applications (IJCA) | Volume 43– No.4, April 2012 | |
7 | A Novel Low Power Design of SRAM Cell And Its Performance Analysis | International Journal of Computer Applications (IJCA) | 2011 |